YTEOL

7.4

Objectid

8254307261

ECCN Code

EAR99

Risk Rank

7.23

Rohs Code

Yes

JESD-30 Code

R-PBCC-N3

Configuration

SINGLE WITH BUILT-IN RESISTOR

Date Of Intro

1997-09-16

JESD-609 Code

e3

Package Shape

RECTANGULAR

Package Style

CHIP CARRIER

Surface Mount

YES

Terminal Form

NO LEAD

Case Connection

COLLECTOR

Terminal Finish

TIN

Country Of Origin

Mainland China

Terminal Position

BOTTOM

Additional Feature

BUILT IN BIAS RESISTANCE RATIO IS 21

Number of Elements

1

Reference Standard

AEC-Q101; IEC-60134

Source Content uid

PDTA123JM

Number of Terminals

3

Package Description

CHIP CARRIER, R-PBCC-N3

Part Life Cycle Code

Active

Samacsys Description

NXP, PDTA123JM PNP Digital Transistor, 100 mA 50 V 2.2 k<ohm/>, Ratio Of 0.047, 3-Pin SC-101

Samacsys Modified On

2019-05-23 14:45:06

Package Body Material

PLASTIC/EPOXY

Polarity/Channel Type

PNP

Reach Compliance Code

compliant

Samacsys Manufacturer

Nexperia

Transistor Application

SWITCHING

DC Current Gain-Min (hFE)

100

Collector Current-Max (IC)

0.1 A

Moisture Sensitivity Level

1

Transistor Element Material

SILICON

Collector-Emitter Voltage-Max

50 V

Peak Reflow Temperature (Cel)

260

Transition Frequency-Nom (fT)

180 MHz

Time@Peak Reflow Temperature-Max (s)

30